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19-2433; Rev 2; 3/05
Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs
General Description
The MAX2116/MAX2118 family of low-cost directconversion tuner ICs are designed for use in digital direct broadcast satellite (DBS) television applications, professional VSAT systems, and two-way Internet through satellite applications. These devices set the standard for integration and performance, significantly reducing the required RF know-how for design implementation. Uniquely architected, the MAX2116/MAX2118 simplify direct main board and tuner module designs. The MAX2116/MAX2118 devices directly convert Lband signals to baseband using a broadband I/Q downconverter. The operating frequency range extends from 925MHz to 2175MHz. Each IC includes an LNA with gain control, I and Q downconverting mixers, and baseband lowpass filters gain and cutoff frequency control. Together, the RF and baseband variable gain amplifiers provide more than 79dB of gain control range. The devices include fully monolithic VCOs, as well as a complete frequency synthesizer. Additionally, an onchip crystal oscillator is provided along with a buffered output for driving additional tuners and demodulators. Synthesizer programming and device configuration are accomplished with a 2-wire serial interface. For multituner applications, each device can be configured to have one of eight possible 2-wire interface addresses. Simplifying the interface to low-voltage CMOS demodulators, the MAX2116/MAX2118 incorporate two 2.85V regulated outputs for pulling up open-drain interface connections, thus preventing noisy 3V rails from corrupting the sensitive analog signal of the tuners. The MAX2116/MAX2118 devices are the most versatile family of DBS products available. With both singleended and differential baseband outputs, these devices are compatible with virtually all QPSK/8-PSK demodulators. The tuners are available in a very small 40-pin thin QFN package. o Fully Integrated VCOs o Supports 1Mbaud to 45Mbaud, 925MHz to 2175MHz Operation o 4MHz to 33MHz Tunable LP Filters o Complete Synthesizer with I2CTM Interface o Analog RF VGA and Digital Baseband VGA o Multiple I2C Addresses for Multituner Applications o Single-Ended (MAX2116) and Differential (MAX2118) I/Q Interface
Features
MAX2116/MAX2118
Ordering Information
PART MAX2116UTL MAX2118UTL TEMP RANGE 0C to +85C 0C to +85C PIN-PACKAGE 40 Thin QFN-EP* (6mm x 6mm) 40 Thin QFN-EP* (6mm x 6mm)
*EP = Exposed pad.
Pin Configuration/ Functional Diagram
IOUT(MAX2118 ONLY) QOUT(MAX2118 ONLY) VCCRF2 VCCBB QOUT+ IOUT+ QDC+ QDC-
40
39
38
37
36
35
34
33
32
31
N.C.
AS0
IDC-
1 DC OFFSET CORRECTION LPF BW CONTROL
30
VCCDIG
IDC+
2 DAC
29
SCL
VCCRF1
3
GC2 DIV2/ DIV4
INTERFACE LOGIC AND CONTROL
28
VREG2
RFIN-
4
27
SDA
Applications
DVB DSS (U.S.) VSAT Internet Through Satellite
RFIN+
5
26
AS1
N.C.
MAX2118
6 /N 7 PFD /R 24 25
N.C.
GC1
XTALOUT
VREG1
8
VOLTAGE REGULATOR ADC CP
23
CNTOUT
N.C.
9 TANK TANK TANK TANK TANK TANK TANK TANK
22
XTAL-
PAD 10
21
XTAL+
11 N.C.
12 VCCLO
13 VCCVCO
14 LOFLT
15 AS2
16 VTUNE
17 CPOUT
18 IFLT
19 VCCCPX
20 CFLT
I2C is a trademark of Philips Corp.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118
ABSOLUTE MAXIMUM RATINGS
VCC to GND ...........................................................-0.3V to +5.5V All Other Pins to GND .................................-0.3V to (VCC + 0.3V) RFIN+ to RFIN-, XTL+ to XTL-, IDC+ to IDC-, QDC+ to QDC- ...................................................................2.0V CNTOUT, XTALOUT, CPOUT, VREG1/2, I/QOUT to GND Short-Circuit Duration.................................10s Continuous Current (any pin other than VCC or GND) .......10mA Continuous Power Dissipation (TA = +85C) 40-Pin Thin QFN (derate 23.3mW/C above +85C) .... 1.86W Operating Temperature Range ..............................0C to +85C Junction Temperature .....................................................+150C Storage Temperature Range ............................-65C to +160C Soldering Temperature (10s) ..........................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, GND = 0V, GC1 = +0.75V; no AC signal applied, default register settings, TA = 0C to +85C, unless otherwise noted. Typical values are at VCC = +5V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER SUPPLY Supply Voltage Supply Current ANALOG GAIN CONTROL INPUT--GC1 Usable Voltage Range Input Current Nominal Output Voltage Swing Output Clipping Voltage DC Output Voltage BASEBAND OUTPUTS-- IOUT, QOUT (MAX2118) Nominal Output Voltage Swing Output Clipping Voltage Common-Mode Voltage DC Offset Voltage ANALOG OUTPUT-- VREG1, VREG2 Output Voltage Source Current STATIC CONTROL INPUTS--AS2, AS1, AS0 Input Voltage High Input Voltage Low Input Current SYNTHESIZER DC PARAMETERS Bits CP1 = 0, CP0 = 0 Charge Pump Source/Sink Current Bits CP1 = 0, CP0 = 1 Bits CP1 = 1, CP0 = 0 Bits CP1 = 1, CP0 = 1 35 70 140 280 50 100 200 400 68 136 272 544 A -50 4 0.5 +50 V V A Each output 2.7 2.85 3.05 3 V mA 0.65 -50 RLOAD = 2k // 10pF (differential) (Note 3) Bit DL = high Bit DL = low 1 0.59 2 0.75 0 0.85 +50 VP-P VP-P V mV 0.75V < GC1 < 2.6V (Note 2) RLOAD = 1k // 10pF (Note 3) BASEBAND OUTPUTS-- IOUT, QOUT (MAX2116) 0.8 2 1.2 VP-P VP-P V 0.75 -50 2.6 +50 V A LO locked at 2175MHz 4.75 195 5.25 265 V mA CONDITIONS MIN TYP MAX UNITS
2
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +4.75V to +5.25V, GND = 0V, GC1 = +0.75V, no AC signal applied, default register settings, TA = 0C to +85C, unless otherwise noted. Typical values are at VCC = +5V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Charge Pump Off-Leakage Current Charge Pump Output Voltage Compliance I2C INTERFACE--SDA, SCL Clock Rate Input Logic Level Low Input Logic Level High Input Hysteresis Input Current Output Logic Level Low VTUNE ADC Resolution Input Voltage Range (Note 4) 110 to 111 101 to 110 ADC Reference Ladder Trip Point ADC read bits 100 to 101 011 to 100 010 to 011 001 to 010 000 to 001 0 VCC 0.70 2.8 1.91 1.29 0.87 0.60 0.40 VCC 0.65 2.97 2.03 1.38 0.94 0.65 0.44 3 VCC VCC 0.60 3.14 2.15 1.47 1.01 0.70 0.48 V Bits V 6mA sink current -10 0.6 2.3 0.2 +10 400 1.5 kHz V V V A V Charge-pump positive-to-negative current matching of 10% CONDITIONS MIN -10 0.4 TYP MAX +10 VCC 0.6 UNITS nA V
MAX2116/MAX2118
AC ELECTRICAL CHARACTERISTICS
(MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800mVP-P (MAX2116), loaded with 1k IOUT = QOUT = 590mVP-P differential (DL = 0, MAX2118), IOUT = QOUT = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2k. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = +25C to +85C. Typical values are at VCC = +5V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER RF FRONT END RF Input Frequency Range TA = 0C to +85C GC1 = 0.75V (max gain), bits GC2(4) - GC2(0) = 00000 (max gain), for output 800 mVP-P GC1 = 2.6V (min gain), bits GC2(4) - GC2(0) = 11111 (min gain), for output 800mVP-P 3 925 -77 2175 -72 dBm 16 MHz CONDITIONS MIN TYP MAX UNITS
Input Carrier Levels Necessary to Produce 800mVP-P at I/Q Baseband Outputs (MAX2116)
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800mVP-P (MAX2116), loaded with 1k IOUT = QOUT = 590mVP-P differential (DL = 0, MAX2118), IOUT = QOUT = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2k. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = +25C to +85C. Typical values are at VCC = +5V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER CONDITIONS GC1 = 0.75V (max gain), bit DL = 1, bits GC2(4) - GC2(0) = 00000 (max gain) for output 800mVP-P GC1 = 2.6V (min gain), bit DL = 1, bits GC2(4) - GC2(0) = 11111 (min gain), for output 800mVP-P GC1 = 0.75V (max gain), bit DL = 0, bits GC2(4) - GC2(0) = 00000 (max gain), for output 800mVP-P GC1 = 2.6V (min gain), bit DL = 0, bits GC2(4) - GC2(0) = 11111 (min gain), for output 800 mVP-P 0.75V < GC1 < 2.6V Bits GC2(4) - GC2(0) = 00000 to 11111 (Note 5) (Note 6) GC1 = 0.75V (max gain), bits GC2(4) - GC2(0) = 00000 (max gain) 75 input source, 925MHz < fRFIN < 2175MHz 925MHz < fLO < 2175MHz Unwanted in 925MHz to 2175MHz band LO-Generated RFIN Second Harmonic Rejection BASEBAND OUTPUTS Baseband I/Q Output Impedance Baseband Highpass -3dB Point Quadrature Phase Error Quadrature Gain Error Baseband Lowpass BW Range LP Filter BW Accuracy Ratio of In-Filter-Band to Out-of-Filter-Band Noise Single ended, real ZOUT 0.1F capacitors at IDC, QDC 125kHz baseband test tone 125kHz baseband test tone Baseband -3dB cutoff frequency Fc = 4MHz Fc = 33MHz (Note 7) Finband = 100Hz to 22.5MHz, Foutband = 87.5MHz to 112.5MHz 4 -5.5 -10 25 30 850 4 1.2 33 +5.5 +10 Hz Degrees dB MHz % % dB Unwanted = 2250MHz Unwanted above 2250MHz 33 30 3 60 19 3 MIN TYP -77 MAX -72 dBm 16 UNITS
Input Carrier Levels Necessary to Produce 1VP-P (Differential) at I/Q Baseband Outputs (MAX2118)
-77
-72 dBm
Input Carrier Levels Necessary to Produce 590mVP-P (Differential) at I/Q Baseband Outputs (MAX2118)
16 69 24 10 22 10.5 13.5 -80 50 45 6dB/oct dB -63 dB dB dBm dBm dB dB dBm
RF Gain Control (GC1) Range Baseband Gain Control (GC2) Range IIP3 IIP2 NF Minimum RF Input Return Loss Maximum LO Leakage at RFIN
4
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800mVP-P (MAX2116), loaded with 1k IOUT = QOUT = 590mVP-P differential (DL = 0, MAX2118), IOUT = QOUT = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2k. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = +25C to +85C. Typical values are at VCC = +5V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER VCO PERFORMANCE VCO Tuning Range VCO Tuning Gain LO Phase Noise Referred to Mixer LO Port SYNTHESIZER PERFORMANCE Phase Detector Comparison Frequency Reference Divide Range RF Divide Range Level at XTALOUT PLL-Referred Phase Noise Floor XTAL Frequency Range 4 4MHz to 27MHz, driving 10pF 0.15 2 256 0.75 1 -143 27 2 128 32768 1.5 VP-P dBc/Hz MHz MHz VCO 0 to VCO 7 coverage Worst case, any VCO, any tuning voltage Bit DIV2 = 1, fLO = 2175MHz 10kHz offset 100kHz offset 2250 500 -75 -99 4500 MHz MHz/V dBc/Hz CONDITIONS MIN TYP MAX UNITS
MAX2116/MAX2118
Note 1: Parameters are production tested at TA = +25C and +85C; limits called out at 0C are guaranteed by design and characterization and are not production tested. Note 2: GCI gain control is guaranteed over this voltage range. 0.75V corresponds to maximum gain and 2.6V corresponds to minimum gain. Note 3: RF front-end specification met at this output level. Note 4: The VTUNE ADC transfer curve has been tailored to that of the VCO tuning curve. Note 5: Input IP3 test conditions: VGC1 set to provide 800mVP-P (MAX2116), 1VP-P differential (MAX2118, DL = high), 0.59VP-P differential (MAX2118 DL = low) baseband output when mixing down a -25dBm tone at 2175MHz to 5MHz baseband, with VGC2 = 00000. Two tones at -18dBm each are applied at fLO -100MHz and fLO -195MHz; IM3 tone at 5MHz is measured at baseband but is referred to RF input. Note 6: Input IP2 test conditions: VGC1 set to provide 800 mVP-P (MAX2116), 1VP-P differential (MAX2118, DL = high), 0.59VP-P differential (MAX2118 DL = low) baseband output when mixing down a -25dBm tone at 2175MHz to 5MHz baseband, with VGC2 = 0.75V. Two tones at -25dBm each are applied at fRF = 925MHz and fRF = 1245MHz; IM2 tone at fLO - 5MHz is measured at baseband but is referred to RF input. Note 7: These parameters are guaranteed by design and characterization, and are not production tested.
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118
Typical Operating Characteristics
(MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800 mVP-P (MAX2116), loaded with 1k IOUT = QOUT = 590mVP-P differential (DL = 0, MAX2118), IOUT = QOUT = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2k. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = 0C to +85C. Typical values are at VCC = +5V, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX2116 toc01
3RD HARMONIC vs. FUNDAMENTAL TONE BASEBAND OUTPUT
MAX2116 toc02
BASEBAND I/Q PHASE ERROR vs. LO FREQUENCY
BASEBAND I/Q PHASE ERROR (DEGREES) 98 96 94 92 90 88 86 84 82 80 500 900 1300 1700 2100 2500
MAX2116 toc03
240 230 SUPPLY CURRENT (mA) 220 210 200 190 180 170 160 4.75 4.85 4.95 5.05 5.15 0C +85C +25C
0 -10 3RD HARMONIC (dBc) -20 -30 -40 -50 -60 -70 FUNDAMENTAL TONE AT 7MHz, 3RD HARMONIC AT 21MHz, RELATIVE TO FUNDAMENTAL
100
5.25
800
900
1000
1100
1200
1300
1400
SUPPLY VOLTAGE (V)
FUNDAMENTAL TONE BASEBAND OUTPUT (mVP-P)
LO FREQUENCY (MHz)
BASEBAND I/Q PHASE ERROR vs. BASEBAND FREQUENCY
MAX2116 toc04
BASEBAND I/Q AMPLITUDE MATCHING vs. BASEBAND FREQUENCY
MAX2116 toc05
BASEBAND FREQUENCY RESPONSE
BASEBAND OUTPUT REL TO FULL SCALE (dB) fC = 22MHz
MAX2116 toc06
100 BASEBAND I/Q PHASE ERROR (DEGREES) 98 96 94 92 90 88 86 84 82 80 0
BASEBAND I/Q AMPLITUDE MATCHING (dB)
fXTL = 4MHz, M = 2, FDAC = 59 (fC = 25MHz)
1.0 0.8 0.6 0.4 0.2 0 -0.8 -0.6 -0.4 -0.2 -1.0 0
fXTL = 4MHz, M = 2, FDAC = 59 (fC = 25MHz)
5 -5 -15 -25 -35 -45 -55 -65
5
10
15
20
25
30
35
5
10
15
20
25
30
35
0.1
1.0
10
100
BASEBAND FREQUENCY (MHz)
BASEBAND FREQUENCY (MHz)
BASEBAND FREQUENCY (MHz)
BASEBAND FILTER 3dB FREQUENCY vs. FDAC
MAX2116 toc07
BASEBAND FILTER 3dB FREQUENCY vs. FDAC AND TEMPERATURE
MAX2116 toc08
VREG1, VREG2: VOUT vs. IOUT
+85C +25C 2.0 VOUT (V) 0C
MAX2116 toc09
50 BASEBAND FILTER 3dB FREQUENCY (MHz) 45 40 35 30 25 20 15 10 5 0 0
BASEBAND FILTER 3dB FREQUENCY (MHz)
fXTL = 4MHz, M = 2
50 45 40 35 30 25 20 15 10 5 0
fXTL = 4MHz, M = 2
3.0 2.5
+25C
0C +85C
1.5 1.0 0.5 0
20
40
60
80
100
120
0
25
50
75
100
125
0
1
2
3
4 IOUT (mA)
5
6
7
8
FDAC (DECIMAL)
FDAC (DECIMAL)
6
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118
Typical Operating Characteristics (continued)
(MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800 mVP-P (MAX2116), loaded with 1k IOUT = QOUT = 590mVP-P differential (DL = 0, MAX2118), IOUT = QOUT = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2k. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = 0C to +85C. Typical values are at VCC = +5V, TA = +25C, unless otherwise noted.)
RF INPUT POWER vs. GC1 (BASEBAND OUTPUT = 800mVP-P)
MAX2116 toc10
BASEBAND GAIN vs. GC2
MAX2116 toc11
NOISE FIGURE vs. LO FREQUENCY
GC1 = 0.75V, GC2 = 0 11.5 +85C NOISE FIGURE (dB) 11.0 10.5 10.0 0C 9.5 9.0
MAX2116 toc12
10 0 RF INPUT POWER (dBm) -10 -20 -30 -40 -50 -60 -70 -80 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 GC1 (V) FROM TOP TO BOTTOM: GC2 = 30, 25, 20, 15, 10, 5, 0
0 GC1 = 1.86V, RFIN = -40dBm, fLO = 1550MHz, fCBB = 20MHz, fBB = 1MHz
12.0
-5 BASEBAND GAIN (dB)
-10
+25C
-15
-20
-25 0 5 10 15 20 25 30 35 GC2 (DECIMAL)
900
1100 1300 1500 1700 1900 2100 2300 LO FREQUENCY (MHz)
NOISE FIGURE vs. GC2
MAX2116 toc13
IIP3 vs. LO FREQUENCY
MAX2116 toc14
IIP2 vs. GC2
25.5 25.0 24.5 IIP2 (dBm) 24.0 23.5 23.0 22.5 22.0 21.5 21.0 GC1 = 0.75V, fLO = 2175MHz
MAX2116 toc15
13.5 13.0 NOISE FIGURE (dB) 12.5 12.0 11.5 11.0 10.5 10.0 0
GC1 = 0.75V, fLO = 1500MHz
17 15 13 11 IIP3 (dBm) 9 7 5 3 1 -1
GC1 ADJUSTED FOR FULL-SCALE BASEBAND OUTPUT WITH PRFIN = -25dBm. FROM TOP TO BOTTOM: GC2 = 0, 5, 10, 15, 20, 25, 30
26.0
5
10
15 GC2
20
25
30
35
925
1125 1325 1525 1725 1925 2125 2325 LO FREQUENCY (MHz)
0
5
10
15
20
25
30
GC2 (DECIMAL)
RF INPUT RETURN LOSS vs. FREQUENCY
MAX2116 toc16
VTUNE vs. VCO FREQUENCY
MAX2116 toc17
VCO_4: VTUNE vs. VCO FREQUENCY
4.0 3.5 3.0 VTUNE (V) 2.5 2.0 1.5 1.0 0.5 0 FROM TOP TO BOTTOM: TEMPERATURE = +85C, +55C, +25C, 0C
MAX2116 toc18
21 20 RF INPUT RETURN LOSS (dB) 19 18 17 16 15 14 13 12
Z0 = 75
4.5 4.0 3.5 3.0 VTUNE (V) 2.5 2.0 1.5 1.0 0.5 0
4.5
500
1000
1500
2000
2500
3000
2100 2600 3100 3600 4100 4600 5100 5600 VCO FREQUENCY (MHz)
3250
3350
3450
3550
3650
3750
3850
FREQUENCY (MHz)
VCO FREQUENCY (MHz)
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118
Typical Operating Characteristics (continued)
(MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800 mVP-P (MAX2116), loaded with 1k IOUT = QOUT = 590mVP-P differential (DL = 0, MAX2118), IOUT = QOUT = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2k. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = 0C to +85C. Typical values are at VCC = +5V, TA = +25C, unless otherwise noted.)
PHASE NOISE AT 10kHz OFFSET vs. FREQUENCY
MAX2116 toc20
VCO (0-3) KV vs. VTUNE
MAX2116 toc19
VCO (4-7) KV vs. VTUNE
525 475 425 375 KV (MHz/V) 325 275 225 175 125 FROM TOP TO BOTTOM: VCO7, VCO6, VCO5, VCO4 -70 -72 -74 PHASE NOISE (dBc/Hz) -76 -78 -80 -82 -84 -86 -88 -90 0.4 1.0 1.6 2.2 VTUNE (V) 2.8 3.4 4.0 925
300 250 KV (MHz/V) 200 150 100 50 0 0.4
FROM TOP TO BOTTOM: VCO3, VCO2, VCO1, VCO0
fCOMP = 1MHz
75 25 1.0 1.6 2.2 VTUNE (V) 2.8 3.4 4.0
1175
1425
1675
1925
2175
FREQUENCY (MHz)
PHASE NOISE vs. OFFSET
-55 -60 PHASE NOISE (dBc/Hz) -65 -70 -75 -80 -85 -90 -95 -100 1 10 OFFSET FREQUENCY (kHz) 100 -120 925 fLO = 2175MHz fCOMP = 1MHz
MAX2116 toc22
LO-TO-RFIN LEAKAGE vs. FREQUENCY
MAX2116 toc23
-50
-60 -70 -80 -90 -100 -110
LO-TO-RFIN LEAKAGE (dBm)
1175
1425
1675
1925
2175
FREQUENCY (MHz)
8
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MAX2116 toc21
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs
Pin Description
PIN 1, 2 3 4 5 6, 9, 11, 25, 31 7 8, 28 10 12 13 14 15, 26, 32 16 17 18 19 20 21, 22 23 24 27, 29 30 33 NAME IDC-, IDC+ VCCRF1 RFINRFIN+ N.C. GC1 VREG1, VREG2 PAD VCCLO VCCVCO LOFLT AS2, AS1, AS0 VTUNE CPOUT IFLT VCCCPX CFLT XTL+, XTALCNTOUT XTALOUT SDA, SCL VCCDIG N.C. (MAX2116) FUNCTION I-Channel Baseband DC Offset Correction. Connect a 0.1F ceramic chip capacitor from IDCto IDC+. DC Power Supply for LNA and First-Stage RF VGA. Connect to a 5V 5% low-noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. 75 RF-Inverting Input. Working in conjunction with RFIN+ for differential input. Terminate with 22pF capacitor in series with a 75 resistor to GND for single-ended input. 75 RF Noninverting Input. Working in conjunction with RFIN- for differential input. Connect to source through a 22pF series capacitor. No Connection. Pin should be connected directly to GND. Gain Control Input for RF Front End. High-impedance analog input with an operating range of 0.75V to 2.6V. VGC1 = 0.75V corresponds to maximum gain. 2.85V Linear Regulator. Used for terminating open-drain interfaces from demodulator. Each regulator can source 3mA. Ground. Direct connection to exposed pad. Can be used to check exposed pad continuity to ground. DC Power Supply for LO Circuits. Connect to a 5V 5% low-noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. DC Power Supply for VCO Circuits. Connect to a 5V 5% low-noise supply. See the Applications Information section for more details. LO Internal Regulator Bypass. Bypass with a 0.22F ceramic chip capacitor to GND. I2C Address Select Control. See Table 1 and Table 2. These pins are internally pullup to VCC. For logic high, leave these pins open. High Impedance VCO Tune Input Charge-Pump Output Test Pin. For normal operation, connect IFLT to ground. DC Power Supply for Charge Pump and XTAL Oscillator Circuits. Connect to a 5V 5% lownoise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. Bypass for Internal Crystal Oscillator Bias. Bypass with a 0.22uF ceramic chip capacitor to GND. Crystal Oscillator Interface. See Typical Operating Circuit. Test Pin. Must be left open. Crystal Oscillator Buffer Output. Requires a 10nF DC-blocking capacitor. I2C Data and Clock Interface. See the Applications Information section for details. DC Power Supply for Digital Circuits. Connect to a 5V 5% low-noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. No Connection. Pin should be connected directly to GND.
MAX2116/MAX2118
QOUT- (MAX2118) Inverting Baseband Quadrature Output
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118
Pin Description (continued)
PIN 34 35 36 37 38 39, 40 -- NAME QOUT+ VCCBB N.C. (MAX2116) IOUT - (MAX2118) IOUT/IOUT+ VCCRF2 QDC+, QDCExposed Pad FUNCTION Noninverting Baseband Quadrature Output DC Power Supply for Baseband Circuits. Connect to a 5V 5% low-noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. No Connection. Pin should be connected directly to GND. Inverting Baseband In-Phase Output Noninverting Baseband In-Phase Output DC Power Supply for RF Circuits and Second-Stage RF VGA Circuits. Connect to a 5V 5% lownoise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. Q-Channel Baseband DC Offset Correction. Connect a 0.1F ceramic chip capacitor from QDC- to QDC+. Ground
Detailed Description
The MAX2116/MAX2118 downconvert RF signals in the 925MHz to 2175MHz range directly to baseband I/Q signals. They are targeted for digital DBS tuner applications. However, the MAX2116/MAX2118 are applicable to any system requiring a broadband I/Q downconversion. Internally, the MAX2116/MAX2118 consist of a broadband front-end LNA and variable gain stage, quadrature downconverter, monolithic broadband VCOs, complete frequency synthesizer, crystal reference oscillator and buffer amplifier, programmable baseband lowpass filters, high-linearity I and Q baseband amplifiers, and offset correction amplifiers. The MAX2116/MAX2118 feature a front-end VGA dynamic range in excess of 60dB. Additionally, the baseband VGA provides in excess of 19dB of additional gain control. The VSWR at RFIN is unaffected by the VGA setting. The MAX2116/MAX2118 include completely monolithic VCOs to cover the entire 925MHz to 2175MHz frequency range. The complete frequency range is covered within a 5V tuning range, thus eliminating the need for costly 30V supplies and varactor diodes. The VCO architecture also eliminates problems associated with frequency pulling with high receive input signal levels.
Applications Information
VCCVCO (Pin 13) Bypass
Adequate filtering of the VCC connection to the VCCVCO supply pin is critical to achieve low phase noise performance. See the Typical Operating Circuit.
Baseband LPFs
The MAX2116/MAX2118 include programmable onchip 7th-order Butterworth lowpass filters. The filter bandwidth is adjusted by setting two internal registers (M, FDAC). The M counter should be set such that the crystal frequency divided by M is between 1MHz and 2.5MHz. The FDAC register is then used to fine tune the bandwidth. The -3dB cutoff frequency is determined by the following equation: f(3dB) = fXTAL / M (4 + 0.145 FDAC) where M and FDAC are decimals. The filter can be adjusted from approximately 4MHz to 33MHz. Total device supply current is dependent on the filter BW setting, with increasing current commensurate with increasing 3dB BW.
I/Q Output Voltage Level
The MAX2116 I/Q outputs are single-ended and optimized for a nominal output voltage drive of 800mVP-P. Output clipping levels are typically 2VP-P. The MAX2118 I/Q outputs are differential, with two possible nominal output voltage levels. The nominal output voltage swing is set through the DL bit Byte 04 (see register table description). With DL = low, the nominal output voltage swing is 590mVP-P differential; DL = high
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs
boosts the baseband output gain by 4.5dB, thus allowing the output voltage swing of 1VP-P. Output clipping levels are typically 2VP-P differential. higher frequency crystals (>20MHz). Recommended values are between 2k and 5k.
MAX2116/MAX2118
DC Offset Compensation IDC and QDC
The baseband highpass response is set through a capacitor connected between IDC+ and IDC- for the I channel and QDC+ and QDC- for the Q channel. The 3dB highpass bandwidth is determined by the following equation: F3dB (highpass in Hz) = 1 / (11.75k C), C in farads To reduce the potential for baseband spurious pickup, keep the connection between the DC compensation capacitors and the IDC and QDC pins as short as possible by placing the capacitors as close to the device as manufacturing allows.
Serial Interface and Control Registers
Programming Bits
The MAX2116/MAX2118 conform to the Philips I 2C standard, 400kbps (fast mode), and operate as a slave. The MAX2116/MAX2118 have eight read and write addresses, which are determined by the logic state of the three address-select pins (AS2, AS1, and AS0). In all cases, the MSB is transmitted and read first (see Tables 1, 2, 3).
Programming Bit Definition
Byte 00 (Default = 03) Bit DIV2 controls the VCO frequency divider. High level = divide-by-2 enabled; low level = divide-by-4 enabled. Default is DIV2 = 0 (divide-by-4 enabled). Bits N(14)-N(8) are the 7 upper bits of the 15-bit programmable N divider, with the default value of N = 950. The overall VCO divide ratio is: 214 N(14) + 213 N(13) ... +25 N(5) + 24 N(4) + 23 N(3) ... + 20 N(0) Byte 01 (Default = B6) Bits N(7)-N(0) are the 8 lower bits of the 15-bit programmable N divider.
VREG1 and VREG2
The MAX2116/MAX2118 include two 2.85V voltage regulator outputs, with a maximum source current rating of 3mA each. These outputs ease the interface to low-voltage demodulators by providing a clean pullup termination for open-drain/collector outputs. VREG1 is located by the GC1 input control, with VREG2 conveniently located between the 2-wire interface control pins.
VCO Selection
The MAX2116/MAX2118 include eight fully monolithic VCOs to cover the entire 925MHz to 2175MHz range. Maxim has a detailed application note that describes the operation of the VCO system and proper selection of the desired VCO. This application note is available by request from Maxim.
Crystal Output Buffer (XTALOUT)
The on-chip crystal oscillator circuit has been designed for operation from 4MHz to 27MHz. The crystal output buffer amplifier is designed to nominally deliver between 0.75VP-P and 1.5VP-P. However, it might be necessary to add a resistor between the XTALOUT pin and ground to increase the signal swing when using
Table 1. MAX2116/MAX2118 Write Address Byte
AS2 Low Low Low Low High High High High AS1 Low Low High High Low Low High High AS0 Low High Low High Low High Low High MSB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 ADDRESS BYTE 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 LSB 0 0 0 0 0 0 0 0
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118
Table 2. MAX2116/MAX2118 Read Address Byte
AS2 Low Low Low Low High High High High AS1 Low Low High High Low Low High High AS0 Low High Low High Low High Low High MSB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 ADDRESS BYTE 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 LSB 1 1 1 1 1 1 1 1
Table 3. MAX2116/MAX2118 Control Register Bytes
WRITE TO MODE RESET VALUE ADDR-H C0 C2 C4 C6 C8 CA CC CE 00 01 02 03 04 05 MSB 1 1 1 1 1 1 1 1 DIV2 N7 R2 X0 ADL D2 1 1 1 1 1 1 1 1 N14 N6 R1 F6 ADE D1 0 0 0 0 0 0 0 0 N13 N5 R0 F5 DL D0 CONTROL BYTE 0 0 0 0 0 0 0 0 N12 N4 CP1 F4 M4 G4 0 0 0 0 1 1 1 1 N11 N3 CP0 F3 M3 G3 0 0 1 1 0 0 1 1 N10 N2 OSC2 F2 M2 G2 0 1 0 1 0 1 0 1 N9 N1 OSC1 F1 M1 G1 LSB 0 0 0 0 0 0 0 0 N8 N0 OSC0 F0 M0 G0
Address
--
N High N Low R and CP and VCO I/Q Filter DAC LPF Divider DAC GC2 and Diag
03 B6 3D 7F 02 1F
Byte 02 (Default = 3D) Bits R2, R1, and R0 are the reference divider bits. The overall reference divide ratio R = 2 x 2 (4 x R2 + 2 x R1 + R0), with the default value of R = 4 (R2 = 0, R1 = 0, R0 = 1). Bits CP1, CP0 control the charge pump current, with the default value of 400A (Table 4). Bits OSC2, OSC1, and OSC0 control which of the eight on-chip VCOs is activated. Default is VCO 5 (101) (Table 5). Byte 03 (Default = 7F) Bit X(0) is unused; default = 0. Bits F(6)-F(0) set the value of FDAC for the baseband lowpass filter -3dB cutoff frequency. (see the Baseband LPFs section).
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FDAC = 26 F(6) + ... +20F(0). (Default FDAC = 127.) Byte 04 (Default = 02) Bit ADL is the VCO ADC latch-enable bit. ADL = 1 latches ADC value (ADL = 0, default). Bit ADE enables VCO tune voltage DAC read. ADE = 1 enables ADC read (ADE = 0, default). Bit DL sets the differential output drive level for the MAX2118 (default, DL = 0) (Table 6). This bit is unused for the MAX2116. Bits M(4)-M(0) set the value of M counter of lowpass filter BW control. M = 24 M(4) + 23 M(3) + ... +20M(0). (Default M = 2.)
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs
Table 4. Charge Pump Current Setting (Byte 02)
CP1 0 0 1 1 CP0 0 1 0 1 CHARGE PUMP CURRENT (A) 50 100 200 400 (default)
I2C Read Status Bits Bit PWR high indicates power has been cycled, and the MAX2116/MAX2118 registers have been reset to default values. A stop condition while in read mode resets this bit. Bits ADC(2), ADC(1), and ADC(0) represent a 3-bit ADC conversion of the VCO tune voltage used for VCO and charge pump current selection and calibration. Bits F(6)-F(0) are a 7-bit representation of the LPF DAC current.
Serial Interface Functional Description
Register Map This is the standard I 2 C protocol. The write/read/ address bytes are dependent on the states of pins AS0/AS1/AS2. Write Operation The first byte is the device address plus the direction bit (R/W = 0). The second byte contains the internal address command of the first address to be accessed. The third byte is written to the internal register directed by the command address byte. The following bytes (if any) are written into successive internal registers. The transfer lasts until stop conditions are encountered. The MAX2116 acknowledges every byte transfer. Read Operation When an address is sent, the MAX2116 sends back first the status byte and then the I/Q DAC byte. Example: Write registers 0 to 3 with 0E, D8, 26 (Table 9). Example: Read from status registers. Sending an ACK terminates slave transmit mode (Table 10).
MAX2116/MAX2118
Table 5. On-Chip VCO Selection (Byte 02)
OSC2 0 0 0 0 1 1 1 1 OSC1 0 0 1 1 0 0 1 1 OSC0 0 1 0 1 0 1 0 1 VCO BAND 0 1 2 3 4 5 (Default) 6 7
Table 6. MAX2118 Output Drive Level Selection (Byte 04)
DL 0 1 IOUT, QOUT OUTPUT VOLTAGE LEVEL (DIFFERENTIAL) (VP-P) 0.59 1.0
BYTE 05 (default = 1F) Bits D(2), D(1), and D(0) control diagnostic features (Table 7). Bits G(4)-G(0) controls the gain of the baseband VGA. The BB gain is minimum at 11111 and the BB gain is maximum at 00000. Default is minimum gain setting of 11111 (Table 8).
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118
Table 7.Diagnostic Functions (Byte 05)
D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Normal operation Force charge pump source current Force charge pump sink current Force charge pump High-Z state Unused N divider output frequency at CNTOUT pin and filter DAC output at IFILT pin R divider output frequency at CNTOUT pin and GC2 DAC output at IFILT pin M divider output frequency at CNTOUT pin DIAGNOSTIC FUNCTIONS
Table 8. Baseband Gain Setting (Byte 5)
READ FROM MODE RESET VAL ADDR-H C1 C3 C5 C7 C9 CB CD CF -- -- MSB 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 PWR F6 0 0 0 0 0 0 0 0 0 F5 0 0 0 0 0 0 0 0 ADC2 F4 0 0 0 0 1 1 1 1 ADC1 F3 0 0 1 1 0 0 1 1 ADC0 F2 0 1 0 1 0 1 0 1 0 F1 LSB 1 1 1 1 1 1 1 1 0 F0
Address
--
Status Info I/Q Filter DAC
00 00
Table 9. Example 1
Start Device Address Write ACK Register Address 00 ACK DATA 0E ACK DATA D8 ACK DATA 26 ACK STOP
Table 10. Example 2
Start Device Address Read ACK Status Register 00 ACK DAC D8 ACK/ NACK STOP
Chip Information
TRANSISTOR COUNT: 10,935
Package Information
For the latest package outline information, go to www.maximic.com/packages.
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Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs
Typical Operating Circuit
QOUT+ VCC VCC QOUTIOUT+ IOUT-
MAX2116/MAX2118
VCC
40
39
38
37
36
35 (MAX2118)
34
33
32 (MAX2118)
31 VCC 30
1 DC OFFSET CORRECTION VCC 2 DAC 3 GC2 DIV2/ DIV4 INTERFACE LOGIC AND CONTROL LPF BW CONTROL
29
SCL
28
4
27
SDA VCC
RFIN
5
26
6
MAX2118
/N /R
25
GC1
7 PFD 8 VOLTAGE REGULATOR ADC CP
24
XTALOUT
23
9 TANK TANK TANK TANK TANK TANK TANK TANK
22
10
21
11 VCC
12 VCC
13
14
15
16
17
18
19 VCC
20
VCC
LOOP FILTER
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

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